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Curriculum
Vita
Personal
Data
Name in Full:
Gil
Dong Hong
Date of Birth:
July 02, 1973
Mailing
Address:
000-000? Janmshil Apt. Songpa-gu,
Seoul, 000-000, Republic of Korea
E-mail address:
Tel:
Sex & Material Status:
Male / Married
Nationality:
Republic of
Korea
Education
09/96 ~ 08/98
Department of Electrical Engineering
Graduate School of Korea University, Seoul, Korea
Master of Engineering degree, conferred in Aug. 1998
(Thesis : A Study on ......... Advisor ; 000000)
03/92 ~
08/96
Department of
Electrical Engineering, Korea University, Seoul, Korea
Bachelor of Engineering degree, conferred in Aug. 1996
(Thesis : A Study on ...........; Advisor ; 000000)
09/95
~ 01/96
ELS Language Centers of ........ University, ....,
Ohio, USA
Work
Experiences
09/01 ~ 06/02
Researcher
at MEMS Product Group(Group Leader : 00000)
(http://misob.lg-elite.com)
LG Electronics Institute of Technology, Seoul, Korea
08/97 ~ 09/01
Researcher
at Micro System Group(Group Leader : 00000)
LG Electronics Institute of Technology, Seoul,
Korea
09/96 ~ 08/98
Research
Assistant at Department of Electrical Engineering,
Graduate School of Engineering, Korea University
09/97 ~ 02/98
Teaching Assistant at Department of Electrical Engineering,
Graduate School of Engineering, Korea University
Research
Experiences
1. Development and Production of Silicon V-groove Using an Anisotropic
Wet Etching Technology
- Development
of Photolithography Process in 2-Dimensional Structure
- Development
of Dry Etching Process for Silicon-Nitride Layer
- Development
of Anisotropic Silicon Wet Etching
2.
Development and Production of Silicon Optical Bench Using MEMS Technology
- Development
of Photolithography Process in 2-Dimensional Structure
- Development
of Photolithography Process in 3-Dimensional Structure
(on Anisotropic Wet-etched Silicon Structure; 10 ~ 500um Etched Depth)
- Development
of Metallization for Conducting Layer(Ti/Pt/Au, Cr/Ni/Au etc.)
- Development
of Metallization for Solder-Pad using Electron-beam Evaporation and
Electroplating
(AuSn etc.)
3.
Development of Silicon Deep Etching
- High-aspect-ratio
Structure Fabrication using a Deep Reactive-Ion-Etcher(STS equipment)
4.
Development of Near Field Optical Data Storage
- Development
of Fabrication Technology for Solid Immersion Lens(SIL) using MEMS Technology
5.
Development of Surface Micromachined Accelerometer
- Simulation
of Fabrication Process using TSUPREM-4
- Simulation
of Device Characteristics using MEDICI
- Design
of Fabrication Process for a Surface Micromachined Accelerometer
Experienced Skills
1. Design and Simulation Techniques of Devices and Processes
- MEDICI
software
- TSUPREM-4
software
- MATLAB
software
- CADENCE
OPUS software
2. Fabrication Processes
- 2-D
and 3-D Photolithography Process
(Photoresist coating, Mask Aligning, Development, etc.)
- Chrome
Photo-Mask Fabrication Process using an Electron-beam
- Dry
Etching Process of Silicon Nitride using ICP-RIE(Inductively Coupled Plasma
Reactive Ion Etcher)
- Wet
Etching Process of various materials
- Deep
RIE Process for High-aspect-ratio Structure
- Electroplating
Process(Au, Cu, Ni, AuSn)
- Isotropic
Silicon Wet Etching Process
- Anisotropic
Silicon Wet Etching Process
- Metallization
Process using Electron-beam Evaporation and Sputtering
- Lift-off
Process(Negative Slope Formation of Photoresist in Photolithography and
Electron-beam Evaporation
for Metallization)
3.
Analysis Technology
- SEM(Secondary
Electron Microscope)
- AFM(Atomic
Force Microscope)
- Alpha-step
- Stress
Measurement System for Thin Film Layers
- Nano-spec.
Publications
- Domestic papers
[1] G.
Hong and J. J. Pak, "Design and simulated output
characteristics of a surface micromachined accelerometer using RGT as a sensing
element," KIEE
MEMS '98 Conference,
pp. 131-140, April 1998.
[2] G.
Hong and J. J. Pak, "A study on the design of a micromachined
silicon accelerometer using resonant gate transistor," J. Information & Communication
Technology, Vol. 7, pp. 115-121, 1997.
[3] G.
Hong and J. J. Pak, "Design and analysis of a surface-micromachined
accelerometer using a thickness variation of a dielectric layer in FET as a
detecting methold," J. Engineering Science & Technology, Vol. 34,
pp. 55-61, 1997.
[4]G.
Hong and J. J. Pak, "Design of a surface-micromachined accelerometer
using FET as a detecting method," KIEE
MEMS '97 Conference,
pp. 331-342, April 1997.
- International papers
[1] K.
Song, J. Bu, Y. Jeon, C. Park, G.
Hong, H. Koh, M. Choi, Micromachined silicon optical bench for
the low cost optical module, Proceedings of SPIEs Miniaturized Systems
with Micro-Optics and MEMS, pp. 375-383, Sep. 1999.
[2] G.
Hong and J. J. Pak, "A surface-micromachined accelerometer
using a movable polysilicon gate FET," Proceedings of SPIE's Far East
and Pacific Rim Symposium on Smart Materials Structures and MEMS, pp. 96-104,
Dec. 1997.
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